首页> 中文期刊> 《电视技术》 >“类整数DCT”变换快速并行算法的硬件实现

“类整数DCT”变换快速并行算法的硬件实现

         

摘要

在分析“类整数DCT”变换基生成规则及其优越综合性能的基础上,设计了一种基于硬件流水线的“类整数DCT”变换快速并行算法的硬件结构,用加法和移位操作实现整数乘法.该设计结构简单、运算速度高、易于与微处理器系统接口,类整数DCT变换及其快速硬件流水算法的获得,为进一步降低视频编解码器的复杂度,提供了一个有价值的参考方案.%Analysis of the generated rules and superiority of "variety integer DCT transform radix". In this paper, a hardware structure is designed based on a hardware pipeline for the parallel algorithm of variety integer DCT transform radix, integer multiplication is implemented by using shifting and addition operation. This design has a simple structure, high speed of operation and can easily interface to the microprocessor system, the fast and parallel algorithm of variety integer DCT transform radix supplies a new valuable solution for reducing the complexity of the video coder and decoder.

著录项

相似文献

  • 中文文献
  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号