首页> 中文期刊> 《电子质量》 >H.264整数DCT的硬件实现

H.264整数DCT的硬件实现

         

摘要

In this paper,the principle of the integer DCT in H.264 is analyzed and then a new algorithm for realization of 4×4 forward integer transform is introduced.There is much a lot of operation of matrix in this algorithm.Compared with the traditional method of decomposing a 2-dimentional DCT transform into two 1-dimentional DCT transforms,the new one doesn't need transpose module,makes the clock cycle delay lower and uses less resources in FPGA,which is more suitable for video signal processing based on H.264.According to the new algorithm,the Verilog program is written and run in QuartusⅡ8.0.%该文在分析了H.264整数DCT(Discrete Cosine Transform)变换原理的基础上,介绍了一种实现4×4前向整数变换的新算法。该算法较多地运用了矩阵运算,与传统的将一个二维DCT变换转变为两个一维DCT变换相比,省略了转置模块,降低了时钟延时,减少了资源占用,更利于达到基于H.264的视频信号处理的性能要求。根据新的算法编写了verilog程序并在QuartusⅡ8.0软件中进行了仿真并得出结果。

著录项

相似文献

  • 中文文献
  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号