基于FPGA的HDB3码编码器优化设计与分析

摘要

HDB3 encoder is designed with two different VHDL program design methods of foui^process and structured design. The two encoders are functionally analyzed in Quartus II 7. 2, and are loaded in EP2C5T144C6 to realize HDB3 code convertion function. The analysis and experiment results show that both HDB3 encoders have exellent coding function. The duty ratio of HDB3 encoder designed with the method of structured design to FPGA logic element (LE) and register is 18. 5% and 14. 8% respectively. It has a good feature of resource utilization.%利用四进程和结构化设计两种不同的VHDL程序设计方法,对HDB3编码器进行了设计、实现和功能分析.设计的两种编码器在QuartusⅡ7.2中进行了功能分析,并且下载到EP2C5T144C6中实现了HDB3编码转换功能.分析与实验结果表明,所设计的两种HDB3编码器,具有好的编码功能.其中,结构化设计的HDB3编码器对FPGA逻辑单元、寄存器的占用分别减少了18.5％和14.8％,具有较好的资源利用特性.