As an industry standarded hardware design and verification language, IEEE Std 1800 -2500 System Verilog has got RTL design.testbench.assertion and coverage together. While the vmm (verification methodology manual) verification methodology which based on the system verilog can obtain more reusable expansibility.more comprehensive function coverage rate and more reasonable verification structure. This paper mainly present a verification environment based on vmm verificatlon methodology and proof VMM verification methodology, s characteristics of reusable extension, self check and hierarchical structure by verifying a video format conversion unit module in multimedia digital video chip, which abbreviate FCU( Fomat Convert Unit) module.%IEEE Std 1800-2500 System Verilog作为一种工业标准硬件设计和验证语言,具有能够把RTL设计、测试平台、断言和覆盖率全面综合在一起的优点。而基于System Verilog的VMM(verification methodology man-ual)验证方法学能够在此基础上获得更多的重用扩展性、更全面的功能覆盖率,以及更合理的层次化验证结构。本文主要提出了一种基于VMM验证方法学的验证环境,通过验证一个多媒体数字视频芯片中视频格式转换功能模块,简称FCU(Fomat Convert Unit)模块,证明了VMM验证方法学的重用性、扩展、自动检查、层次化结构的特点。
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