硬件描述语言Verilog的建模技术

摘要

Through analyzing the hierarchical modeling, gate - level modeling, clataflow modeling, behavioral modeling andswitch-level modeling, this paper expounds the modeling method of Verilog HDL. It is useful to study and use the Verilog HDL,and it is also meaningful to constitute the language standard of Verilog HDL in Ghina%通过对Verilog语言的层次化建模、门级建模、数据流级建模、行为建模、开关级建模等各个抽象层次的研究，全面阐述了Verilog的建模方法。对于理解、使用和制订我国的Verilog语言标准会有所帮助。