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基于钟控非线性序列的RFID伪随机数发生器设计

     

摘要

以RFID加密系统的伪随机数发生器为研究对象,提出以线性反馈移位寄存器(LFSR)为基本部件的复合型钟控非线性伪随机数发生器的设计方法.通过Matlab和QuartusII对该设计的周期、线性复杂度、均匀性、功耗等特征参数进行分析,最后硬件电路采用FPGA产品中低成本、低功耗的Cyclone Ⅱ实现.此设计既保持了基本钟控非线性序列循环周期长、线性复杂度高的特性,同时提高了输出序列取值分布的均匀性,电路结构简单,并行输出16位数据,能够满足RFID加密系统的要求.%Focused on the study of Pseudo-Random Number Generator (PRNG) in RFID encryption system, a design of complex clock-controlled PRNG was proposed, which is constituted by the linear feedback shift register ( LFSR). Some characteristic parameters of the design were analyzed, such as sequence cycle, linear-complexity, uniformity, power consumption etc, through the Matlab and Quartus Ⅱ sofeware. Hardware circuit used the low-cost and low-power Cyclone Ⅱ of FPGA products. This method maintains these properties of long cycle and high linear complexity of the clock-contrlloed non-linear sequence, but also improves the uniformity of output sequence. In addition, this design of circuit structure is simple and can output 16 bit parallel data. Therefore, it can satisfy the requirements of RFID encryption system.

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