首页> 中文期刊>北京理工大学学报:英文版 >Design and Realization of Schottky Barrier Didoes in 130nm CMOS Process

Design and Realization of Schottky Barrier Didoes in 130nm CMOS Process

     

摘要

A polysilicon separated CMOS Schottky barrier diode is designed and tested in this study.By replacing the shallow trench isolation(STI)of a ploy ring,the series resistances of Schottky diodes are reduced,leading to an improvement in cut-off frequencies.The device structure is detailed and a device model is developed.Our analysis on the device shows that the cut-off frequency increases with the decreasing of the Schottky contact area.Based on this observation,the Schottky contact area is set to0.38×0.38μm^2,which is the minimum contact diffusion area allowed by the process flow.The distance between the anode and the cathode is also discussed.Diodes with different dimensions are fabricated and measured.Through extensive measurements,the optimum dimensions are obtained.Bondpads with a reduced area are used to improve the measurement accuracy.The measurement results show that these diodes can achieve a cut-off frequency of 1.5 THz.Thus,it is possible to use these diodes in THz detection.

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