In a smal circuit nuclear design based on 51 SCM,no I/O port enoughand internal clock interrupt to realize I2C bus function.In this paper,the use of VHDL language programming necessary for FPGA without affecting the 51 SCM also addresses are assigned to 8 bit paral eldata into serial data with I2C bus protocol,iIplementation of I2C host control er function.%在以51单片机为核的小型电路设计中,没有足够的I/O端口与内部时钟中断实现I2C总线功能。本文运用VHDL语言对FPGA进行必要的编程,在不影响51单片机地址分配的同时能够将8位并行数据转化为符合I2C总线协议的串行数据,实现I2C主机控制器功能。同时,应用MaxPlus软件对设计进行时序仿真,分析设计可行性与存在的不足,该设计能够满足预定目标,拓展FPGA应用。
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