一种采用数字修调技术的低温漂带隙基准设计

摘要

基于tsmc0.25μm CMOS工艺,设计了一个采用数字修调技术的低温漂高PSRR带隙基准源.针对带隙基准结构中不可避免的由于工艺偏差而导致输出基准电压温度特性较差的问题,通过引入额外的PTAT电流来改变流过PNP的电流,进而补偿由于工艺角变化引起的带隙基准温度系数的改变,实现低温漂基准电压源.仿真结果表明,5 V电源电压下,在-50~+150℃,基准电压温度系数为3ppm/℃,与无数字修调的带隙基准相比,温度系数减小了5 ppm/℃.低频时电源抑制比为-90 dB,整体功耗电流约为60μA.%In this paper, a bandgap reference with low temperature-drift and high PSRR used digital trimming technology is designed based on tsmc0.25 μm CMOS process. Aiming at the problem that it is inevitable to cause bad temperature activity because of process deviation in the bandgap architecture , an extra PTAT current is introduced into the PNP to compensate for the deviation of TC of VBE in different corners, thus achieving bandgap voltage reference with good TC behavior. Simulation results show that the bandgap has a temperature coefficient of 3ppm/℃ from -50~150 ℃ in 5 V supply, PSRR is -90 dB in low frequency and quiescent current is 60μA.