首页> 中文期刊> 《电子元件与材料》 >一种Buck变换器中的误差放大器设计

一种Buck变换器中的误差放大器设计

         

摘要

Based on the analysis of system's stability and the requirement of load transient response, an error amplifier and it's compensation scheme for constant on-time(COT) Buck converter were presented. The error amplifier has the advantages of good frequency characteristic, high gain and simple compensation network. In the paper, the proposed circuit structure and compensation scheme were explained and derived in theory. The phase margin of system was verified by using Simplis software. And based on 0.18 μm BCD process, Hspice was used to simulate the circuit. Simulation results show that when the input voltage is 2.7-5.5 V and output voltage is 1.8 V, the phase margin range is from 62.5° to 69.3°and the load transient recovery time is less than 17.3 μs.%基于系统稳定性的分析和负载瞬态响应的需求,本文设计了一种用于电流模式恒定导通时间(COT)架构DC-DC降压Buck变换器的高性能误差放大器并提出系统补偿方案.该误差放大器在保证频率特性良好的同时,具备高增益、补偿网络简单的优点.文中对所提出的电路结构以及系统补偿方案进行了详细的说明与理论推导,并使用Simplis软件对系统相位裕度进行仿真,最后基于0.18 μm BCD(Bipolar CMOS DMOS)工艺,使用Hspice软件对电路进行了仿真验证.仿真结果表明:电源电压为2.7~5.5 V、输出电压为1.8 V时,系统的相位裕度位于62.5°到69.3°之间,负载瞬态恢复时间最大仅为17.3 μs.

著录项

相似文献

  • 中文文献
  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号