Intel提出的第三代总线技术PCI Express在结构上可以满足计算机系统的发展对总线带宽的要求，基于PCIE的设计得以蓬勃发展，对PCIE的验证也成为SoC功能验证的重要组成部分。为此，设计并实现一种状态图和覆盖率组合驱动的自动化验证平台，主要包括激励生成、自动检测和覆盖率分析机制，并将其应用于一款基于PCIE接口的协议栈芯片的功能验证。实验结果表明，该验证平台具有较好的激励生成机制，能够对协议栈芯片进行全面验证，同时具有较好的复用性、可扩展性，可以对多个协议栈的互连进行验证。%Intel’ s third generation of PCI Express bus technology can satisfy the requirements to the development of the computer system from the bus bandwidth on the structure,which leads to the vigorous development of IC design based on PCIE. The verification of the PCIE becomes an important part of function verification of the SoC. This paper designs and implements an automatic verification platform driven by combination both state graph and coverage, which mainly includes the mechanism of test generation, automatic check and coverage analysis. It uses the platform to verify the function of a protocol stack chips based on PCIE. Experimental results show that the verification platform has a good stimulus generation mechanism, which can conduct a comprehensive verification of the protocol stack chip design. In addition,the platform has the advantage of good reusability and expandability,which can verify the system of the multiple protocol stack interconnected.
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