极化码SCL译码器设计

摘要

极化码被认为是最近几年编码理论的重大突破之一,其在离散无记忆信道下能达到香农极限,且编译码具有较低的复杂度.SCL译码算法是SC的改进算法,其填补了SC类算法与ML算法的间隙.基于此种译码算法,设计码长N=1024,列表宽度L=32极化码译码器,选用Altera公司的Stratix V系列的5SGXEA7N2F45C1芯片,实现结果表明,其工作频率在300MHz下,能达到约6.5Mpbs的吞吐率.%Recently,Polar codes are seen as a breakthrough in channel coding.It has been proved that they can achieve the Shannon Limit under discrete memoryless channels. Moreover,their encoding and decoding algorithm have low complexity. The SCL decoding algorithm is an improved version of SC algorithm,which bridges the gap between the SC and the ML decoding of polar codes. Based on this algorithm,a SCL polar decoder with code length N=1024 and the list width L=32 is proposed,5SGX-EA7N2F45C1 chip of Altera Stratix V series are chosen to implement. The final results show that the decoder can achieve the throughput of about 6.5Mpbs under operating frequency of 300MHz.