混沌伪随机序列发生器的 FPGA设计与实现

摘要

基于简化Lorenz系统，提出混沌伪随机序列发生器的一种设计方法。根据IEEE-754浮点运算标准，按照模块化设计理念，设计混沌方程所需的浮点运算模块，并在FPGA（ Field Programmable Gate Array）上实现了简化Lorenz混沌系统。设计混沌伪随机序列量化算法，对生成的混沌伪随机序列进行复杂度分析。分析结果表明，量化算法显著提高了序列复杂度。使用NIST标准进行伪随机序列性能测试，测试结果表明，序列具有良好的随机特性，可直接用于实际加密应用。为连续混沌系统FPGA实现和混沌伪随机序列在信息安全中的应用奠定了基础。%A design method of chaotic pseudo-random sequence generator is proposed based on simplified Lorenz system in this paper.Ac-cording to IEEE-754 floating-point operation standard and the idea of module design,we design the modules of floating point operation for sol-ving chaotic equations,and implement the simplified Lorenz chaotic system on FPGA.Moreover,a quantification algorithm of chaos pseudo-random sequence is designed,and the complexity analysis is performed on the generated chaos pseudo-random sequences,analysing results show that the quantification algorithm remarkably improves the complexity of the sequences.Then the NIST standard is employed in perform-ance test of pseudo-random sequences,test results show that the sequence has good pseudo-random character and can be directly used to prac-tical encryption applications.It lays the foundation for the implementation of continuous chaotic system FPGA and the application of chaos pseudo-random sequence in information security.