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DESIGNING THE ARCHITECTURE OF A PROLOG MACHINE

         

摘要

In order to implement Prolog efficiently, Prolog-oriented processors and VLSI chips have been proposed and designed. However, most of the Prolog machines and processors emerged recently suffer from two weaknesses: they cannot implement Prolog database operations or cannot perform numerical evaluations at high speed. In this psper, the architecture of a Prolog machine GKD-PLM is presented. Based on the WAM-PLUS which is an execution model for sequential Prolog, the GKD-PLM can not only execute Prolog code rapidly, but also support database operations and numerical evaluations. First, the characteristics of the machine are described, followed by the description of the instruction set, the data representations, and the hardware structures of the execution unit and the microprogram control unit of the Prolog processor SPP. The performance of the machine is estimated.

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