大规模高速背板的信号完整性设计与仿真

摘要

本文首先从联合战术无线电系统的规模分析了设计大规模高速背板的必要性，同时从信号完整性方面分析了高速背板设计中所面临的问题，包括反射、串扰、损耗与衰减、电源完整性等几个方面的机理及对PCB设计造成的不良影响，并针对这几个信号完整性问题给出了相应的 PCB 设计准则。其次，针对一款基于串行RapidIO 高速总线的背板系统从PCB设计的层叠设计、布线设计、过孔设计等方面给出具体分析与设计方案。最后，通过Sigrity公司的Power SI仿真软件、Synopsys公司的Hspice仿真软件和Quantum公司的QSI仿真软件进行信号完整性仿真和Ansoft公司的Siwave5.0仿真软件进行电源完整性仿真，通过仿真分析对PCB信号完整性进行验证与设计优化。%In this paper,the necessity to design a large-scale high-speed backplane is analyzed from the perspective of Joint Tactical Radio System scale. Some prob lems of high speed backplane design are analyzed, including reflection, crosstalk, wastage and attenuation, power integrity etc, and some design principles are presented. An effective blueprint was designed for backplane system based on Serial RapidIO high-speed bus,analysis and scheme were given from the perspective of stack, wiring and drilling design. In the end, project signal integrity was analyzed by Power SI(Sigrity Co.) ,Hspice(Synopsys Co.)and QSI(Quantum Co.)simulation software,and its power integrity was analyzed by Siwave5.0(Ansoft Co.) simulation software based on the simulation conclusion , in order to validate and optimize PCB signal integrity design.