温度改变对钛氧化物忆阻器导电特性的影响

摘要

Nano-scaled titanium oxide memristors exhibit unstable conductive characteristics under the same test condition:restricting the possibility to have accurate reading and control of the transient resistance of the device. Moreover, the reliability and stability of memristor-based circuits cannot be guaranteed. Coexistence of dopant drift and tunnel barrier is one of possible origins which causes undesirable instability, and the ambient temperature has a close relationship with dopant drift. However, there have been no detailed researches which may improve the stability of memristors by controlling temperatures. Based on the coexistence of dopant drift and tunnel barrier, the connections between temperature and memristor conductive characteristics are analyzed, and the influences of changes of active area width and initially doped layer width on the critical temperature are studied. Simulations are performed in SPICE and the results are given in this paper. In conclusion, methods are proposed for enhancing the conductive stability of memristors, which include increasing the active area width, decreasing the initially doped layer width, keeping the temperature to be under the critical value, and stability. Our work may provide a basis for manufacturing memristors with stable performance and promoting the practical circuit in applications.%相同测试条件下，纳米钛氧化物忆阻器的导电过程存在不稳定性，制约了对器件瞬态阻抗的精确读取与控制，并影响了器件应用于电路设计的可靠性与稳定性。杂质漂移与隧道势垒的共存是导致上述不稳定性的可能因素，且杂质漂移特性与环境温度密切相关。然而，目前尚无通过控制温度提高忆阻器导电稳定性的具体研究。基于杂质漂移与隧道势垒共存，本文分析了温度与忆阻器导电特性的关联，研究了器件活跃区域厚度及初始掺杂层厚度的改变对临界温度的影响，利用SPICE软件进行了仿真验证并给出结果，得出提高忆阻器导电稳定性的方法有：增大活跃区域厚度、降低初始杂质浓度及保持环境温度稳定且低于临界温度，从而为制备性能稳定的忆阻器及推动器件在实际电路中的应用提供依据。