Quality Improvement of VLSI Circuits through Efficient Error Modeling, Detection and Prediction

摘要

With continuous scaling of CMOS technology, we are able to integrate more functionality with improved performance onto a single silicon die in each new technology generation. However, as the chip density increases, numerous issues like aging, design/manufacturing defects, increased energy inefficiency arise to damage VLSI circuits quality. In this thesis, we propose to deal with these issues with efficient aging models, quick error detection and approximation error prediction techniques.;First of all, Negative Bias Temperature Instability (NBTI) is one of the major VLSI circuits lifetime reliability threats, which gradually increases circuit delay and finally results in timing errors. NBTI-induced timing errors depend heavily on time-varying parameters such as duty cycle, supply voltage and temperature. Previous analytical models for NBTI effects, however, cannot cover all these parameters, causing overly optimistic or overly pessimistic analysis. In this thesis, we propose a comprehensive NBTI analytical model that explicitly takes duty cycle, supply voltage and temperature variations into consideration for estimating timing errors. The accuracy of the proposed model is validated against cycle-accurate simulation for NBTI effects. Based on the proposed model, we present an efficient simulation framework for system lifetime prediction by running representative workloads only. Lifetime reliability of VLSI circuits can be effectively improved with accurate modeling of NBTI effects.;Secondly, we propose a novel diagnostic framework for troubleshooting non-deterministic faults, namely RetroDMR. Non-deterministic faults occur due to design and/or manufacturing defects, and will significantly damage circuits quality if not treated. In RetroDMR, we log the essential events (e.g., the sequence of thread migration) in the faulty run to record the mapping relationship between threads and their corresponding execution units. Then in the following diagnosis runs, we apply redundant multithreading (RMT) technique to reduce error detection latency, while at the same time we try to follow the thread migration sequence of the original run whenever possible. By doing so, RetroDMR significantly improves the reproduction rate and diagnosis resolution for non-deterministic faults.;Finally, due to the increasing energy inefficiency of ensuring hardware reliability, approximate computing, being able to trade off computation quality and computational effort (e.g., energy) by exploiting the inherent error-resilience of emerging applications (e.g., recognition and mining), has been adopted for quality improvement of VLSI circuits. By applying approximate computing techniques, it is important to ensure that the output quality is acceptable. In this thesis, we first propose an effective and efficient quality control method by error prediction. Our solution judiciously determines when and how to rollback for quality assurance, which is achieved with cost-effective yet accurate quality predictors that synergistically combine the outputs of several basic light-weight predictors. Then we enhance our previous solution and propose a unified quality assurance framework, namely ApproxQA, by considering both rollback recovery and online approximation mode tuning as a two-level controller. By applying our method, integrated circuits can achieve more energy efficiency with quality assurance.