Measuring power distribution system resistance variations for application to design for manufacturability and Physical Unclonable Functions.

摘要

Metal resistance variations in back-end-of-line processes can be significant, particularly during process bring-up. In this thesis, I propose a simple method to measure resistance variations in the Power Distribution System (PDS) of an IC, and describe how these measurements can be applied to a Physical Unclonable Function (PUF). Our technique exploits the PDS, which is an existing distributed resource in all ICs, and provides a means of characterizing metal resistance in the context of an actual circuit design. By applying a sequence of tests using small on-chip support circuits attached to the PDS, the resistance of components of the PDS can be obtained from the solution to a set of simultaneous equations. The results from hardware experiments involving two sets of test chips fabricated in an IBM 65nm technology show significant changes in the resistance variation of some components of the PDS as the process evolved.;This process variation data can be applied to hardware security by forming a PUF from the various resistance components of the PDS.We demonstrate that this PUF signature can then be used to uniquely identify each IC, even in the more evolved set of test chips. Based on a population of 24 ICs, we have determined that the PUF is capable of distinguishing all but 47 out of 10,000 ICs. The signature may require only 46 bytes per IC.