Studies of growth mechanism and defect origins in 4H-silicon carbide substrates and homoepitaxial layers.

摘要

4H-Silicon Carbide (SiC) has been touted for widespread use in high power semiconductor devices due to its higher thermal conductivity, breakdown voltage and saturated electron drift velocity compared to the current material of choice, silicon. However, the detrimental effects of defects inside these crystals requires concerted effort on the part of crystal growth scientists to gain understanding of their formation mechanisms and behavior in order to develop strategies to eliminate them or minimize their densities. The goals of this study are to: (i) understand the growth mechanisms of the Physical Vapor Deposition (PVT) technique used for 4H-SiC substrate growth and the Chemical Vapor Deposition (CVD) technique used for homo-epitaxial growth; (ii) determine the formation mechanism and behavior of defects along with the influence of the changes in growth conditions on their configurations for the cases of PVT and CVD growth. Phenomena studied include the nucleation and propagation of growth dislocations with Burgers vectors of c, c+a, and a; the formation mechanism of grown-in stacking faults of Shockley, Frank and combined Shockley/Frank types involving overgrowth by macrosteps; the spontaneous formation of Double Shockley stacking faults in highly nitrogen doped substrates during annealing; the mechanism of multiplication of basal plane dislocations involving the "so-called" Hopping Frank Read Source; prismatic slip of threading edge dislocations and the subsequent cross-slip onto the basal plane; the mechanism of defect transfer from substrate to epilayer during CVD growth; and the mechanism of misfit relaxation between the epilayer and substrate during CVD growth - of particular interest are the simultaneous formation of interfacial dislocations along with half loop arrays since the latter provide short segments of basal plane dislocation in the epilayer that become the sources for Shockley stacking faults through the mechanism of Recombination Enhanced Dislocation Glide during forward biasing of pin diodes. Various state of state-of-the-art experimental techniques have been used during this research, including (i) non-destructive Synchrotron X-ray Topography (XRT) mainly done in NSLS and APS synchrotron sources; (ii) Transmission Electron Microscope (TEM) carried out in CFN; (ii) Scanning Electron Microscope (SEM); (ii) Nomarski Optical Microscopy (NOM) and (iv) Defect Selective Chemical Etching using KOH.