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SATFAST: A statistical tool for fault simulation and test generation.

机译:SATFAST:用于故障仿真和测试生成的统计工具。

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With the advent of VLSI technology, test pattern generation (TG) for high fault coverage is regarded as one of the most difficult problems in the field of VLSI testing. It has been known for some time that the process of TG is NP-complete (17-21). TG can consume CPU time and memory at a rate that increases at least as the square of the number of gates in the circuit (17). For VLSI circuits, this is a serious limitation. As a result, testability analysis has become a prime issue. In the testability analysis of digital circuits, one is often faced with the task of computing the signal probabilities of each node of the circuit. However, it has been known that computing signal probabilities is #P-complete (23,51). This implies that the problem might be intractable even if P = NP. Thus, any practical method will only provide an estimate of such probabilities instead of computing the exact values.; Current algorithms for estimating signal probabilities could be classified into linear or polynomial algorithms. The accuracy of linear algorithms, such as the simple and the weighted averaging algorithms, is far from satisfactory while the complexity of polynomial algorithms is close to fault simulation and test generation.; This dissertation introduces a linear but effective algorithm based on a new set of inference rules for estimating signal probabilities, which we shall call the possibilistic algorithm. The proposed algorithm provides significantly better estimates of signal probabilities than the simple algorithm as well as the weighted averaging algorithm, and it is also linear in the product of circuit size and the number of primary inputs.; Based on this algorithm, a statistical tool, termed SATFAST (a StAtistical Tool for FAult Simulation and Test generation) is developed. The output of this tool provides an estimation of: signal probabilities, sensitization probabilities, and detection probabilities of stuck-at faults. Moreover, it calculates other statistical parameters such as expected test length, expected fault coverage evaluation, identification of hard-to-detect faults for a predetermined threshold of acceptability, and a good sample of faults that mirrors the total estimate of fault distribution (53).; It is also demonstrated that the computational complexity of SATFAST is linear in the product of the circuit size and the number of primary inputs. Experimental results using ISCAS benchmark circuits show the effectiveness of the tool. The correlation coefficients of the results are found to be extremely good, while the tool is demonstrated to be very fast.
机译:随着VLSI技术的出现,用于高故障覆盖率的测试模式生成(TG)被视为VLSI测试领域中最困难的问题之一。一段时间以来,已知TG的过程是NP完全的(17-21)。 TG可以消耗CPU时间和内存的速率至少与电路(17)中门数量的平方成正比。对于VLSI电路,这是一个严重的限制。结果,可测试性分析已成为首要问题。在数字电路的可测试性分析中,经常要面对计算电路每个节点的信号概率的任务。但是,众所周知,计算信号概率是#P完全的(23,51)。这意味着即使P = NP,问题也可能难以解决。因此,任何实用的方法将仅提供这种概率的估计,而不是计算精确值。当前用于估计信号概率的算法可以分为线性算法或多项式算法。线性算法(例如简单算法和加权平均算法)的准确性远远不能令人满意,而多项式算法的复杂性却接近故障仿真和测试生成。本文介绍了一种基于线性推理算法的有效算法,该算法基于一组新的推理规则来估计信号概率,我们将其称为可能性算法。与简单算法和加权平均算法相比,所提出的算法提供了更好的信号概率估计,并且在电路大小和主要输入数量的乘积中也是线性的。基于此算法,开发了一种统计工具,称为SATFAST(用于故障仿真和测试生成的统计工具)。该工具的输出提供以下估计:信号概率,敏感度概率和卡住故障的检测概率。此外,它还计算其他统计参数,例如预期的测试长度,预期的故障覆盖范围评估,针对预定的可接受阈值识别难以检测到的故障以及反映故障分布总体估计的良好故障样本(53) 。;还证明了SATFAST的计算复杂度在电路大小和主要输入数量的乘积中是线性的。使用ISCAS基准电路的实验结果证明了该工具的有效性。结果的相关系数非常好,而该工具的速度很快。

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