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Development of 3.3V flash ZE(2)PROM cel and array.

机译:开发3.3V闪存ZE(2)PROM cel和阵列。

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Most of the conventional flash E2PROM cells have major limitations for low voltage applications and suffer from slow programming speeds. This thesis describes a Zener based MOS flash memory cell (ZE 2PROM), programmed by hot electrons generated by a heavily doped reverse biased p+n+ junction attached to the drain. The Zener based programming method provides a practical solution to some of the limitations of conventional channel hot electron programming method. This cell operates with a single supply of 3.3V and achieves an order of magnitude reduction of programming time compared to conventional flash memory cells. The reduced Zener breakdown current also enables many bits to be programmed simultaneously. The cell can be implemented in a NOR type memory array. It uses an orthogonal write technique to achieve fast programming with low power dissipation and reduced drain disturbance. The modeling of the charge transfer behavior of the ZE2PROM cell is investigated using 2-D device simulations to specify the charging and discharging of the floating gate during programming and erasing.; Experimental ZE2PROM arrays were implemented in a 0.8 m m lithography CMOS process flow in which the n-LDD step was replaced with a one sided p+ boron implant with a doping level of ∼ 1019cm-3. This minor change to a standard CMOS process, makes the concept highly attractive for embedded memory applications. A programming time of 850ns at 3.3V supply was achieved on fabricated test devices.
机译:大多数传统的闪存E2PROM单元在低电压应用方面存在主要局限性,并且编程速度较慢。本文介绍了一种基于齐纳二极管的MOS闪存单元(ZE 2PROM),该单元由附着在漏极上的重掺杂反向偏置p + n +结所产生的热电子编程。基于齐纳的编程方法为常规沟道热电子编程方法的某些局限性提供了一种实用的解决方案。与传统的闪存单元相比,该单元采用3.3V的单电源供电,可将编程时间缩短一个数量级。降低的齐纳击穿电流还使得可以同时对许多位进行编程。该单元可以在NOR型存储器阵列中实现。它使用正交写入技术来实现具有低功耗和减少漏极干扰的快速编程。使用二维器件仿真研究了ZE2PROM单元的电荷转移行为的模型,以指定在编程和擦除过程中浮栅的充电和放电。实验ZE2PROM阵列是在0.8 m m光刻CMOS工艺流程中实现的,其中n-LDD步骤被掺杂水平为〜1019cm-3的单面p +硼注入所代替。对标准CMOS工艺的微小改动使该概念对于嵌入式存储器应用极具吸引力。在装配好的测试设备上,在3.3V电源下的编程时间为850ns。

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