VLSI technology for efficient and dynamic power management, delivery, and utilization.

摘要

Technology to improve the dynamic power efficiency of VLSI platforms was developed based on the unique combination of embedded high-speed voltage scaling, precise power sensing, and a class of analog circuits whose performance can be tuned via the supply voltage. Detailed theoretical analyses were derived, and selected technologies were prototyped and measured in a conventional 0.5-micron bulk CMOS process. The performance also was extrapolated to a state-of-the-art 0.18-micron bulk CMOS process.;The findings revealed that voltage scaling based on embedded DC/DC converters provides significant advantages for the temporal and spatial control of power utilization by a load. With the inclusion of precise in situ power sensing, power management also gains a mechanism for the "intelligent" dynamic partitioning of a load. Digital logic easily exploits dynamic power management; to extend such benefits to the analog domain, high-speed variable-rate analog-to-digital comparators were also developed. The findings also revealed that dynamic power management can be implemented reliably, at low cost and low complexity.;The developed technologies are fundamental and generic. They are applicable to a broad spectrum of electronic and optoelectronic devices.