Experimental and numerical evaluation of embedded capacitance for power bus noise suppression in multi-layer printed circuit board designs.

摘要

Embedded capacitance is a promising alternative to discrete decoupling capacitors for power bus noise mitigation. In this research work, experimental and numerical techniques are developed and applied to evaluate embedded capacitance in multi-layer printed circuit board designs. First, the electrical performance of embedded capacitance boards is measured and compared to standard FR4 boards. Measurement results show that unlike discrete decoupling capacitors, embedded capacitance can efficiently reduce power bus noise over a broad frequency range.; To understand the power bus noise performance of embedded capacitance boards, the fundamental properties of closely-spaced power-retum plane pairs are further explored. A cavity model is applied to characterize the rectangular power-retum plane structures because this model is relatively simple yet reasonably intuitive. Using the cavity model, the effects of various loss mechanisms are examined for typical embedded capacitance boards. The important role of the conductive loss is revealed. The validity of the cavity model for lossy power-return plane structures is also investigated. Finally, a closed-form analytical expression is developed to estimate the input impedance of lossy power-return plane structures employed in embedded capacitance boards.