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Low-Density Parity-Check Codes for Data Storage and Memory Systems.

机译:用于数据存储和存储系统的低密度奇偶校验码。

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摘要

For high density magnetic recording channels and memory systems, low-density parity-check (LDPC) codes with probabilistic decoding are replacing Reed-Solomon (RS) codes or Bose-Chaudhuri-Hocquenghem (BCH) codes with conventional algebraic decoding. The main benefit of LDPC codes over the RS and BCH codes is that LDPC codes can provide lower error probabilities than equivalent conventional codes if the conditions of magnetic recording channels or memory systems are the same. In other words, in order to achieve the same error probabilities, LDPC codes can tolerate lower signal-to-noise-ratio conditions than the conventional codes, which can imply higher densities and lower media costs. These advantages of LDPC codes are possible at the cost of the increased decoder complexity over the conventional decoding.;The main themes of this thesis are (1) to determine probabilistic input to the LDPC decoders from the channel detectors in magnetic recording channels or memory systems with low complexity and (2) to demonstrate the benefits of LDPC codes in the proposed schemes. The probabilistic inputs dealt with in this thesis can be either correlated or uncorrelated. The probabilistic inputs from magnetic recording channels (and also from Viterbi detector outputs) or from multiple-bit-per-cell memory model are correlated and the probabilistic inputs from single-bit-per-cell memory model are uncorrelated. Binary and nonbinary LDPC codes are discussed for both magnetic recording channels and memory systems.;The contributions of this thesis to the field of signal processing and error correcting methods can be summarized as follows. (1) For intersymbol-interference channels with data-dependent and correlated noise, an analytic method is developed to identify the most probable error patterns of Viterbi detector output and to estimate the probability of each error pattern. These are very important information to design, for example, post processors or sync marks for timing recovery. (2) For magnetic recording channels, it is demonstrated that LDPC codes without outer concatenated RS codes provide lower sector error rates than the concatenation of LDPC and RS codes when the user bit density is fixed, which suggests that LDPC codes should completely replace RS codes. Neither serial or parallel concatenation improves the performance. (3) For magnetic recording channels, performance and complexity of 4kB LDPC codes for recent 4kB sector format are investigated. (4) A reduced-complexity turbo equalization method is proposed and it is shown that coding gains, about 0.5 dB to 1 dB, can be obtained over the case without turbo equalization. The method uses binary soft output Viterbi detectors (SOVA) for nonbinary LDPC decoders and avoids costly exact marginalization of joint probabilities of bits in nonbinary symbols. (5) A general model for nonvolatile memory cells without probabilistic outputs, either multiple-bit-per-cell or single-bit-per-cell, is derived for any time-invariant error sources such as a constant radiation environment. It is shown that probabilistic input to LDPC decoders can be generated based on the derived model and it is also shown that binary and nonbinary LDPC codes can outperform conventional RS or BCH codes using the proposed methods.
机译:对于高密度磁记录通道和存储系统,具有概率解码功能的低密度奇偶校验(LDPC)码已用传统的代数解码方式代替了Reed-Solomon(RS)码或Bose-Chaudhuri-Hocquenghem(BCH)码。 LDPC码相对于RS和BCH码的主要好处是,如果磁记录通道或存储系统的条件相同,则LDPC码可提供比等效常规码更低的错误概率。换句话说,为了获得相同的错误概率,LDPC码可以比常规码容忍更低的信噪比条件,这意味着更高的密度和更低的媒体成本。 LDPC码的这些优点有可能以增加解码器复杂度为代价,而不是传统的解码。;本论文的主要主题是(1)确定从磁记录通道或存储系统中的通道检测器向LDPC解码器输入的概率输入(2)展示了所提出方案中LDPC码的好处。本文处理的概率输入可以是相关的,也可以是不相关的。来自磁记录通道(也来自维特比检测器输出)或每单元多位存储模型的概率输入是相关的,而来自每单元每位存储模型的概率输入是不相关的。讨论了磁记录通道和存储系统的二进制和非二进制LDPC码。本论文对信号处理和纠错方法领域的贡献可归纳如下。 (1)对于具有数据相关和相关噪声的符号间干扰信道,开发了一种分析方法来识别维特比检测器输出的最可能错误模式并估计每个错误模式的概率。这些是非常重要的信息,例如用于时序恢复的后处理器或同步标记。 (2)对于磁记录通道,已证明,当用户比特密度固定时,没有外部级联RS码的LDPC码提供的扇区错误率比LDPC级和RS码级联低,这表明LDPC码应完全替代RS码。 。串行或并行串联都不能提高性能。 (3)对于磁记录通道,研究了最近4kB扇区格式的4kB LDPC码的性能和复杂性。 (4)提出了一种降低复杂度的turbo均衡方法,结果表明,在没有turbo均衡的情况下,可以获得约0.5dB至1dB的编码增益。该方法将二进制软输出维特比检测器(SOVA)用于非二进制LDPC解码器,并且避免了非二进制符号中比特联合概率的昂贵精确边缘化。 (5)对于任何时不变的误差源(例如恒定辐射环境),推导了没有概率输出的非易失性存储单元的通用模型,即每单元多个位或每个单元一个位。示出了可以基于导出的模型来生成到LDPC解码器的概率输入,并且还示出了使用所提出的方法,二进制和非二进制LDPC码可以优于常规的RS或BCH码。

著录项

  • 作者

    Jeon, Seungjune.;

  • 作者单位

    Carnegie Mellon University.;

  • 授予单位 Carnegie Mellon University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2010
  • 页码 162 p.
  • 总页数 162
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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