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Integrated methodology for board assignment and component allocation in printed circuit board assembly.

机译:印刷电路板组件中电路板分配和组件分配的集成方法。

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The purpose of this research is to develop an approach to minimize makespan for assigning boards to production lines. Because of sequence-dependent setup issue, board assignment and component allocation have to be performed concurrently. An integrated methodology is proposed to obtain a solution of the two problems. The methodology consists of seven phases: PCB grouping, family decomposition, subfamily sequencing, Keep Tool Needed Soonest (KTNS), component setup determination, component allocation, and board assignment.; PCB grouping based on component similarity between boards is used to reduce the problem size. Family decomposition is used when total number of feeder slots required by a family exceeds feeder capacity. Subfamily sequencing and Keep Tool Needed Soonest are applied to minimize the number of component setups. Classification of setup components into standard, semi-standard, and custom setup components is performed to reduce the complexity of the component allocation problem. A component allocation algorithm is developed to balance workload across machines. Assigning board families to production lines is performed using a modification of Longest Processing Time (LPT) rule. Assigning entire PCB families to production lines to minimize makespan is difficult to accomplish since the amount of production time for each family is very large compared to that of individual PCB lot. Splitting some subfamilies is allowed as long as this does not increase makespan. The PCB grouping, family decomposition, subfamily sequencing, Keep Tool Needed Soonest (KTNS), and component setup determination procedures are derived from published research results. The component allocation and board assignment are developed in this research, as well as an overall methodology to integrate the entire problem.; Data provided by published literature are employed to evaluate performance of the component allocation algorithm and the integrated methodology. To examine the applicability of the methodology, an industrial data is used with the total imbalance due to setup time and placement time of individual PCB and global makespan as the performance measures. Experimentation is conducted with simulated data based on an industry data to investigate impact of threshold value, feeder capacity, and characteristics of data sets on system performance.
机译:这项研究的目的是开发一种方法,以最小化将板分配给生产线的制造时间。由于取决于序列的设置问题,必须同时执行电路板分配和组件分配。提出了一种综合方法来解决这两个问题。该方法包括七个阶段:PCB分组,族分解,子族排序,保持刀具需要尽快(KTNS),组件设置确定,组件分配和电路板分配。基于板之间组件相似度的PCB分组用于减小问题的大小。当一个家庭需要的馈线插槽总数超过馈线容量时,将使用家庭分解。应用亚家族测序和需要保持工具尽快可以最大程度地减少组件设置的次数。将安装程序组件分为标准,半标准和自定义安装程序组件,以降低组件分配问题的复杂性。开发了一种组件分配算法来平衡机器之间的工作量。使用修改的最长处理时间(LPT)规则将板系列分配给生产线。将整个PCB系列分配给生产线以最小化制造时间是很难完成的,因为与单个PCB批次相比,每个系列的生产时间非常多。允许拆分一些子系列,只要这不会增加有效期。 PCB分组,族分解,亚族排序,需要保持工具尽快(KTNS)和组件设置确定程序均来自已发表的研究结果。该研究开发了组件分配和董事会分配,以及整合整个问题的整体方法。公开文献提供的数据用于评估组件分配算法和集成方法的性能。为了检验该方法的适用性,使用了一个工业数据,将由于单个PCB的设置时间和放置时间以及整体制造时间所导致的总不平衡作为性能指标。基于行业数据对模拟数据进行实验,以调查阈值,馈线容量和数据集特征对系统性能的影响。

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