An AES-128 crypto chip using a high-speed parallel-pipelined architecture.

摘要

Rijndael is one of the robust encryption techniques adopted by NIST as the Advanced Encryption Standard (AES). This document implements Rijndael and discusses its implementation techniques and scope of application. The idea behind this thesis is to develop an AES-128 hardware based encryption and decryption methodology that is highly portable and is suitable for high throughput applications. This implementation can be used purely as an encryptor, as a decryptor or as an integrated unit. The proposed encryption implementation achieves a throughput of over 29 Gbps which is higher than any other implementation in literature. We consider that the throughput is sufficient for high speed data encryption applications.