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Reduction of energy consumption on Network-On-Chip using a data encoding technique.

机译:使用数据编码技术减少片上网络上的能耗。

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摘要

Network-On-Chip (NOC) technology requires high speed communications between the various parts on the chip such as the microprocessor, memory, digital signal processing modules (DSP), etc. As a result of their complexity, NOC architectures have high power requirements, which is a critical issue especially for portable battery-powered devices. In this project, various data encoding and decoding techniques are used in an attempt to reduce the power consumption on the NOC. Three data encoding schemes are presented and compared through simulations performed using the Verilog Hardware Description Language (VHDL). The results of the simulations show that two of the schemes reduce switching activities and consequently reduce power consumption to a considerable degree as compared to the baseline system.
机译:片上网络(NOC)技术要求芯片上各个部分之间的高速通信,例如微处理器,存储器,数字信号处理模块(DSP)等。由于它们的复杂性,NOC架构对功率的要求很高。 ,这对于便携式电池供电的设备尤其重要。在该项目中,尝试使用各种数据编码和解码技术来减少NOC上的功耗。通过使用Verilog硬件描述语言(VHDL)执行的仿真,提出并比较了三种数据编码方案。仿真结果表明,与基线系统相比,其中两种方案减少了开关活动,因此在很大程度上降低了功耗。

著录项

  • 作者

    Gadde, Virinchi.;

  • 作者单位

    California State University, Long Beach.;

  • 授予单位 California State University, Long Beach.;
  • 学科 Engineering.;Electrical engineering.
  • 学位 M.S.
  • 年度 2016
  • 页码 43 p.
  • 总页数 43
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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