首页> 外文学位 >Resonant gate driver design for high efficiency switching power converter.
【24h】

Resonant gate driver design for high efficiency switching power converter.

机译:用于高效开关电源转换器的谐振栅极驱动器设计。

获取原文
获取原文并翻译 | 示例

摘要

In the modern switching mode DC to DC power supply system, in order to achieve better dynamic performance, smaller volume and less weight, the switching frequency of the converting system has continued to increase in recent decades. With higher switching frequency, frequency dependent power losses increase correspondingly, and thus the power efficiency of the power supply system deteriorates. Reducing switching related losses and improving the power efficiency has become a great challenge.;Switching loss is the dominant source of frequency dependent losses. With impact of parasitic gate resistance and source inductance, the switching speed of the power MOSFET driven by conventional voltage source gate driver (VSD) is limited. With resonant gate driver (RGD), a resonant inductor is introduced to the gate drive system and the power MOSFET is turned-on/off by the L-C resonance network. Type I RGD with zero initial resonant inductor current is able to recover part of the gate driving energy and is suitable for low switching loss applications. Type II RGD or current source gate driver (CSD) with pre-charged initial resonant inductor current is able to achieve the fast switching of power MOSFET and reduces its switching loss. Furthermore, with easily adjustable gate driving current, more flexibility can be obtained in the gate driver design.;In this dissertation, impact of parasitic gate resistance and source/drain inductance on the switching process of gate drivers is analyzed. Then, the body diode clamping effect that occurs in the current source gate driver is discussed. Next, the high dynamic range current source gate driver (HD-CSD) is proposed to eliminate the body diode clamping effect and further improve the power efficiency. Detailed operation processes of different types of gate drivers are analyzed and compared. An analytical model is built to predict driver operation and switching power losses of current source gate drivers. Test prototypes are built based on the synchronous buck converter and the boost converter with both low voltage and high voltage power MOSFETs. In order to keep low peak reverse recovery current and EMI while reducing the switching loss, an adaptive gate driver is designed which combines the VSD and HD-CSD. Experimental results that evaluate the power efficiency improvement of the proposed resonant gate drivers are presented.
机译:在现代开关模式DC-DC电源系统中,为了实现更好的动态性能,更小的体积和更轻的重量,转换系统的开关频率在近几十年来一直在增加。随着更高的开关频率,与频率有关的功率损耗相应地增加,因此电源系统的功率效率恶化。减少与开关相关的损耗并提高功率效率已成为一个巨大的挑战。开关损耗是频率相关损耗的主要来源。受寄生栅极电阻和源极电感的影响,由常规电压源栅极驱动器(VSD)驱动的功率MOSFET的开关速度受到限制。使用谐振栅极驱动器(RGD),将谐振电感器引入栅极驱动系统,并通过L-C谐振网络打开/关闭功率MOSFET。 I型RGD的初始谐振电感器电流为零,能够恢复部分栅极驱动能量,适用于低开关损耗应用。具有预充电初始谐振电感器电流的II型RGD或电流源栅极驱动器(CSD)能够实现功率MOSFET的快速开关并降低其开关损耗。此外,通过易于调节的栅极驱动电流,可以在栅极驱动器设计中获得更大的灵活性。本文分析了寄生栅极电阻和源极/漏极电感​​对栅极驱动器开关过程的影响。然后,讨论了在电流源栅极驱动器中发生的体二极管钳位效应。接下来,提出了高动态范围电流源栅极驱动器(HD-CSD),以消除体二极管的钳位效应并进一步提高功率效率。分析并比较了不同类型栅极驱动器的详细操作过程。建立了一个分析模型来预测驱动器操作和电流源栅极驱动器的开关功率损耗。基于同步降压转换器和具有低压和高压功率MOSFET的升压转换器构建测试原型。为了在降低开关损耗的同时保持较低的反向恢复峰值电流和EMI,设计了一种自适应栅极驱动器,该驱动器结合了VSD和HD-CSD。提出了评估所提出的谐振栅极驱动器的功率效率改善的实验结果。

著录项

  • 作者

    Zhou, Xin.;

  • 作者单位

    North Carolina State University.;

  • 授予单位 North Carolina State University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2010
  • 页码 131 p.
  • 总页数 131
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号