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Compiler techniques for efficient communications in multiprocessor systems.

机译:用于在多处理器系统中进行有效通信的编译器技术。

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摘要

Technical advances have brought circuit switching back to the stage of interconnection network design for high performance computing. Although circuit switching has long connection establishment delays and the dedication of connections prevents other communicating nodes from sharing the network, it has simple control logic and significant cost advantage over packet or wormhole switching. With the proper assistance from compilers, circuit switching has the potential of providing significant performance benefits when connections can be established prior to the actual communication.;This dissertation presents a novel compilation framework for achieving efficient communications in circuit switching interconnection networks. The goal of the framework is to identify communication patterns in Single-Program-Multiple-Data (SPMD) parallel applications and compile these patterns as network configuration directives. This can significantly reduce the communication overhead on circuit switching interconnection networks.;A powerful representation scheme is developed in this research to capture the property of communication patterns and allow manipulation of these patterns. Based on the temporal and spatial localities of communications and the capability of the compiler to identify the communication patterns, we classify communication patterns into three categories---static, persistent , and dynamic. We target static and persistent communications, which are dominant in most parallel applications. To identify communication patterns, we develop a novel symbolic expression analysis. We develop certain compiler techniques for analyzing communication patterns. Since the underlying network capacity is limited, we develop an algorithm to partition the program into phases based on the communication requirements and network capacity.;To demonstrate the effectiveness of our framework, we implement an experimental compiler. The compiler identifies the communication patterns from the source code, partitions the program into phases, and inserts the network configuration directives at phase boundaries to achieve efficient communications. The compiler also can generate communication traces, which provides useful information about the communication pattern correlated to the structure of the source code. We develop a multiprocessor system simulator to evaluate our techniques. Our simulation-based performance analysis demonstrates that using our compiler techniques can achieve the same level, or even better level of communication performance than fast packet switching networks while using much less expensive circuit switches.
机译:技术进步使电路切换回到了用于高性能计算的互连网络设计阶段。尽管电路交换具有长的连接建立延迟,并且连接的专用性阻止其他通信节点共享网络,但与分组交换或虫洞交换相比,它具有简单的控制逻辑和显着的成本优势。在编译器的适当协助下,当可以在实际通信之前建立连接时,电路交换具有提供显着性能优势的潜力。本文为实现电路交换互连网络中的高效通信提供了一种新颖的编译框架。该框架的目标是识别单程序多数据(SPMD)并行应用程序中的通信模式,并将这些模式编译为网络配置指令。这可以大大减少电路交换互连网络上的通信开销。本研究开发了一种强大的表示方案,以捕获通信模式的属性并允许对这些模式进行操作。基于通信的时间和空间局部性以及编译器识别通信模式的能力,我们将通信模式分为三类-静态,持久和动态。我们针对静态和持久通信,这在大多数并行应用程序中占主导地位。为了识别交流模式,我们开发了一种新颖的符号表达分析。我们开发了某些编译器技术来分析通信模式。由于底层的网络容量有限,我们根据通信需求和网络容量开发了一种将程序划分为多个阶段的算法。为了证明我们框架的有效性,我们实现了一个实验性的编译器。编译器从源代码中识别通信模式,将程序划分为多个阶段,并在阶段边界处插入网络配置指令以实现有效的通信。编译器还可以生成通信跟踪,该通信跟踪提供有关与源代码的结构相关的通信模式的有用信息。我们开发了一个多处理器系统模拟器来评估我们的技术。我们基于仿真的性能分析表明,与快速分组交换网络相比,使用编译器技术可以实现相同或更高的通信性能,同时使用便宜得多的电路交换器。

著录项

  • 作者

    Shao, Shuyi.;

  • 作者单位

    University of Pittsburgh.;

  • 授予单位 University of Pittsburgh.;
  • 学科 Computer Science.
  • 学位 Ph.D.
  • 年度 2010
  • 页码 178 p.
  • 总页数 178
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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