EFFICIENT HARDWARE ARCHITECTURES OF MIMO RECEIVERS FOR HSDPA APPLICATIONS IN FREQUENCY SELECTIVE CHANNELS: A COMPARISON

摘要

Efficient hardware architectures are required for the advanced baseband signal processing for the HSDPA extension of third generation wireless systems. Frequency selective propagation channels deteriorate the orthogonality of the transmission and produce interference, thus advanced algorithms are demanded. The investigated receiver architectures include RAKE and MMSE equalizer models as well as algorithms for Transmit and Receive Diversity and multiple-input multiple-output (MIMO) modes, according to the 3GPP standard. Regarding a hardware implementation, the advanced reception algorithms are described with synthesizable SystemC code. The most promising receiver architectures in respect to BER performance and hardware complexity are adaptive chip-level MMSE equalizers in combination with Receive Diversity or MIMO signal processing. Adaptive chip-level equalizers allow an improvement of performance with low additional complexity.