Energy Characterization and Optimization of Parallel Prefix-Sums Kernels

摘要

Prefix-sums appear frequently in numerous computational tasks, and many performance efficient parallel prefix-sums algorithms have been introduced for shared and distributed memory architectures. However, as far as we know, the energy consumption behavior of these algorithms is unknown, as well as the energy-performance trade-offs. This paper is a first attempt to address the energy aspects of CPPS (cache-aware parallel prefix-sums), a high performance parallel prefix-sums kernel specific for x86 shared memory architectures. We provide implementation details for CPPS and various sequential prefix-sums algorithms that are used as building blocks. We measure performance and energy consumption of CPPS with different configurations (sequential prefix-sums kernel, CPU frequency, number of threads and thread placement policy). The results show significant energy savings, from 24 % to 55%, when configuring CPPS with an optimized rather than a non-optimized sequential prefix-sums kernel for various different CPU frequency levels and number of threads.