Progress in Optimization of High-Power, High-Speed VCSEL Arrays

摘要

Flip-chip bonding enables a unique architecture for two-dimensional arrays of VCSELs. Such arrays feature scalable optical power outputs and the capability to separately address sub-array regions while maintaining fast turn-on and turn-off response times. Performance of these devices is critically dependent both on the design of the VCSEL devices and the design of the sub-mount, which provides both the electrical and thermal contacts for the array. Recent results for modelling and optimization of the VCSELs and their corresponding sub-mounts are discussed.