Technology mapping for sequential circuits based on retimingtechniques

摘要

A new technology mapping technique for implementing sequentialncircuits by table lookup FPGAs (field programmable gate arrays) withnpredefined memory elements is presented. Most mapping algorithms in thisnfield are restricted to combinational logic. The presented methods fornoptimizing delay and area consumption are based on a redesign of thencircuit with retiming and specific sequential transformations.nExperimental results of several benchmark circuits show an improvementnof up to 20% less area consumption and delay in comparison to existingntools