Quantitative evaluation of the carrier concentrations in Si substrates with the use of scanning tunneling microscopy/spectroscopy

摘要

Rapid progress in the fabrication techniques of semiconductor devices is making possible the production of extremetly miniaturized transistors in the nanometer scale. However, since no effective techniques have yet been established to evaluate the distribution of doped impurities in semiconductor substrates with not only a high spatial resolution but also quantitative doping concentrations, the recent development of nanoscale transistors have required much time and cost. Scanning tunneling microscopy/scanning tunneling spectroscopy (STM/STS) is one of the most promising techniques to quantitatively evaluate doping concentratios. Using STM/STS, we have already demonstrated that the nanoscale pn junctions formed on silicon substrates are clearly visible in the nanometer scale [1]. However, a tip-smaple distance was not estimated in the method, so the quantitative impurity concentrations at each measured point are difficult to discuss. In this paper, we examine the relation between the current-voltage characteristic and the impurity concentration obtained from STS measurements under a constant tip-sample distance. Based on these results, the capability of quantitatively evaluating local impurity concentrations by STS is discussed.