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Reliability Analysis of Single Grain Si TFTs using 2D Simulation

机译:使用2D模拟的单晶硅TFT可靠性分析

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摘要

Single grain thin-film transistors (SG-TFTs) fabricated inside a location-controlled grain by u-Czochralski process have as high as SOI performance despite low-temperature process. Reliability of SG-TFTs is a very important issue. The degradation effects of SG-TFTs under bias-stress conditions are mostly mobility degradation, threshold voltage changing, subthreshold characteristic degradation. These effects need to be modeled in order to predict the reliability for any bias-stress conditions applied to the device. To obtain that, extraction parameters strategy of degradation model has to be found out. The degradation model is thus confirmed for different bias-stress conditions.
机译:尽管采用低温工艺,但通过u-Czochralski工艺在位置控制的晶粒内部制造的单晶粒薄膜晶体管(SG-TFT)具有与SOI一样高的性能。 SG-TFT的可靠性是一个非常重要的问题。 SG-TFT在偏置应力条件下的退化效果主要是迁移率退化,阈值电压变化,亚阈值特性退化。需要对这些效应进行建模,以预测施加到设备的任何偏置应力条件的可靠性。为此,必须找到退化模型的提取参数策略。因此,对于不同的偏压力条件,可以确定退化模型。

著录项

  • 来源
    《Thin Film Transistors 9 (TFT 9)》|2008年|109-114|共6页
  • 会议地点 Honolulu HI(US)
  • 作者单位

    Delft University of Technology, Feldmannweg 14, 2628 CT Delft, the Netherlands;

    Delft University of Technology, Feldmannweg 14, 2628 CT Delft, the Netherlands;

    Delft University of Technology, Feldmannweg 14, 2628 CT Delft, the Netherlands;

    Delft University of Technology, Feldmannweg 14, 2628 CT Delft, the Netherlands;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 表面处理;
  • 关键词

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