Investigation of Pt/Si/CeO_2/Pt MOS Device Structure by Impedance Spectroscopy

摘要

Epitaxial grqwth of dielectric layers on silicon substrates has attracted a great deal of recent interest given their potential applicability in the fabrication of high quality silicon-on-insulator (SOI) structures, high density capacitor devices, and stable buffer layers between silicon and other materials. Cerium dioxide (CeO_2) appears to be a particularly attractive candidate, given its high dielectric constant and its compatibility with Si. To date, measurements of the electrical properties of CeO_2 films on Si have been largely limited to room temperature. In this study, thin films of CeO_2 were prepared by in situ pulsed laser deposition (PLD) on n-type (100) silicon substrates, with varied deposition conditions. Capacitance-voltage measurements (C-V) were used to characterize the response of the Pt/Si/CeO_2/Pt MOS capacitor structure. Impedance measurements were performed from room temperature to 350℃. This enabled the independent characterization of the electrical signature of the Pt/Si interface which was found to contribute insignificantly above approximately 150℃. The CeO_2 film conductivity was found to be thermally activated with activation energy of ～0.45 eV, with its magnitude strongly dependent on film microstructure.