首页> 外文会议>Symposium on Electrically Based Microstructural Characterization II held December 1-4, 1997, Boston, Massachusetts, U.S.A. >Conductance Transients Study of Slow Traps in Al/SiN_x:H/Si and Al/SiN_x:H/InP Metal-INsulator-Semiconductor Structures
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Conductance Transients Study of Slow Traps in Al/SiN_x:H/Si and Al/SiN_x:H/InP Metal-INsulator-Semiconductor Structures

机译:Al / SiN_x:H / Si和Al / SiN_x:H / InP金属-绝缘体-半导体结构中慢陷阱的电导瞬变研究

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We have obtained Al/SiN_x:H/Si and Al/SiN_x:H/InP Metal-Insulator-Semiconductor devices by directly depositing silicon nitride thin films on silicon and indium phosphide wafers by the Electron Cyclotron Resonance Plasma method at 200 deg C. The electrical properties of the structures were first analyzed by Capacitance-Voltage measurements and Deep-Level Transient Spectroscopy (DLTS). Some discrepancies in the absolute value of the interface trap densities were found. Later on, Admittance measurements were carried out and room and low temperature conductance transients in the silicon nitride/semiconductor interfaces were found. The shape of the conductance transients varied with the frequency and temperature at which they were obtained. This behavior, as well as the previously mentioned discrepancies, are explained in terms of a disorder-induced gap-state continuum model for the interfacial defects. A perfect agreement between experiment and theory is obtained proving the validity of the model.
机译:通过在200摄氏度下通过电子回旋共振等离子体方法在硅和磷化铟晶片上直接沉积氮化硅薄膜,我们已经获得了Al / SiN_x:H / Si和Al / SiN_x:H / InP金属-绝缘体-半导体器件。首先通过电容电压测量和深层瞬态光谱法(DLTS)分析结构的电性能。发现界面陷阱密度的绝对值存在一些差异。随后,进行了导纳测量,并发现了氮化硅/半导体界面中的室温和低温电导瞬变。电导瞬变的形状随获得它们的频率和温度而变化。这种行为以及前面提到的差异是根据针对界面缺陷的无序诱发的间隙状态连续体模型来解释的。实验和理论之间取得了完美的一致性,证明了该模型的有效性。

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