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A sub-1V bandgap voltage reference in 32nm FinFET technology

机译:采用32nm FinFET技术的低于1V的带隙基准电压源

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The bulk CMOS technology is expected to scale down to about 32 nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1 V bandgap reference circuit is implemented in a 32 nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.
机译:体CMOS技术有望缩小到约32 nm节点,而后继者可能是FinFET。 FinFET是一种超薄型多栅极MOS晶体管,具有其他特点,与传统的体MOS晶体管相比,其电压增益高得多。带隙基准电路不能直接从体CMOS技术移植到SOI FinFET技术,因为既不能在薄SOI层中实现传统的二极管,又不能在仅具有金属(lic)栅极的工艺中容易获得面积有效的电阻器。在本文中,采用32 nm SOI FinFET技术实现了低于1 V的带隙基准电路,其架构显着降低了所需的总电阻值。

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