Monolithic integration of Ⅲ-Ⅴ As- and P-based devices on Si through direct MBE growth and using lattice engineered substrates

摘要

Monolithic integration of Ⅲ-Ⅴ material with Si have shown great potential to improve characteristics of integral circuits by increasing operational frequencies, reducing power consumption and, potentially, by replacing electrical interconnections with optoelectronic lines to increase data transfer speed. In this paper we discuss the integration of InP lattice parameter based quantum well field effect transistors and heterojunction bipolar transistors on Si via direct growth on Si substrates and using Silicon-on-lattice-engineered substrates. Main focus is on improvement of structural quality and reduction of epi-layer defects and dislocation density. The epi-layer transport properties and single transistor performance fabricated on Si was compared to references on InP substrates.