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Systematic Design of a New 3-Bit-Burst-Error Correction Code with Minimal Number of Check Bits

机译:具有最少校验位数量的新3位突发错误校正码的系统设计

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In this paper a new 3-bit burst-error correcting code is proposed. Compared to a 1-bit error correcting Hamming code only two additional check bits are needed and compared to a 3-bit burst-error correcting Burton code the number of check bits can be reduced by 2.Since the proposed code is systematically designed by use of finite field algebra the code can be determined for an arbitrary word length and decoding is simple. Examples for different word length with up to about 1000 bits are described.The proposed code can correct single bit errors, adjacent two-bit errors, adjacent 3-bit errors and nearly adjacent 2-bit errors and may be useful for error correction in registers or register arrays, in combinational circuits and also in memories for which data-multiplexing is not used. With respect to the number of check bits the proposed code is optimal for code lenghts greater than 27.
机译:本文提出了一种新的3位突发纠错码。与1位纠错汉明码相比,仅需要两个附加校验位,而与3位突发纠错伯顿码相比,校验位的数量可减少2%。对于有限域代数,可以为任意字长确定代码,并且解码很简单。描述了最多约1000位的不同字长的示例,所提出的代码可以纠正单个位错误,相邻的两位错误,相邻的3位错误和几乎相邻的2位错误,并且可能对寄存器中的错误纠正有用在组合电路中以及在不使用数据多路复用的存储器中,这些寄存器或寄存器阵列。关于校验位的数量,建议的代码对于大于27的代码长度是最佳的。

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