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An Efficient Implementation of BCD to Seven Segment Decoder using MGDI

机译:使用MGDI的BCD到七段解码器的有效实现

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摘要

Now-a-days majority of practical applications such as valet car parking, larger temples necessitate, seven segment displays to give a visual token of the numbers. Digital counters are the one which are used for these applications. The four bit Binary Coded decimal form will normally be the output states of digital counters and thus they are not relevant for straightly activating 7 segment displays. The special BCD to 7 segment display decoder ICs are used in converting the incoming BCD signal to a form convenient for activating these displays. In this paper, an efficient BCD to seven segment converter is designed using Modified Gate Diffusion Input Technique (MGDI). The suggested MGDI based BCD to seven segment converter is contrasted with the conventional Complementary CMOS gates based BCD to seven segment converter. Both the implementations are done by means of Cadence 180 nm technology. Simulation result shows that the MGDI based BCD to seven segment display decoder consumes 51 % less area, 98.97 % power and 98.8 % delay compared with the conventional Complementary CMOS gates based BCD to seven segment display decoder.
机译:如今,大多数实际应用(例如代客泊车,更大的太阳穴)都需要七个分段显示,以直观地显示这些数字。数字计数器是用于这些应用的计数器。四位二进制编码的十进制形式通常是数字计数器的输出状态,因此它们与直接激活7段显示无关。特殊的BCD至7段显示解码器IC用于将输入的BCD信号转换为便于激活这些显示的形式。在本文中,使用改进的门扩散输入技术(MGDI)设计了一种有效的BCD到七段转换器。建议的基于MGDI的BCD到七段转换器与传统的基于互补CMOS门的BCD到七段转换器形成对比。两种实现都是通过Cadence 180 nm技术完成的。仿真结果表明,与传统的基于互补式CMOS门的BCD七段显示解码器相比,基于MGDI的七段显示解码器的BCD减少了51 \%的面积,98.97 \%的功耗和98.8 \%的延迟。

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