An Automatic Logic Circuit Drawing Input and Simulation System :KD-AILDS

摘要

Development of a system for automatic input of drawings offers numerous advantages for efficient and reliable inlet of graphic data into CAD system.We have btilt a prototype system called KD-AILDS,which can read a logic circuit drawing autcmatically,and simulate its function.This system consists of three processes as the following:RTV ccnversion,recognition,and simulation.This paper first describes the general configuration of KD-AILDS,and then makes a special effort to introduce a new RTV algorithm:two-simensional parallel vector coding algorithm,which has been proved to be a very useful method for the coding of linear drawing.Finally,some experimental results will be presented.The comparison with scme conventional CAD systems shows that the KD-AILDS is full automatic.