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The real-time target track process system design and the fast arithmetic research

机译:实时目标跟踪过程系统设计与快速算法研究

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In order to resolve the contradiction between real-time and arithmetic complex in television tracking capture system, the paper discusses a real-time target track processing system which is constructed by high performance DSP chipset TMS320C6416 as core digital processor, huge reprogrammable logic chipset CPLD as system logic controller and field reprogrammable array FPGA as image preprocessing chipset to sampled video digital image. In the same time, the author also improved target capture arithmetic by introducing a kind of fast image correlation matching arithmetic based on evolutionary algorithms. Major parts put on hardware construct, working theory and new image correlation matching algorithms. Furthermore the comparison of the performance provided by this method with conventional matching algorithms is discussed. Theoretical analysis and simulation results show that the proposed algorithm is very effective.
机译:为了解决电视跟踪捕获系统中实时性和运算复杂性之间的矛盾,本文讨论了一种实时目标跟踪处理系统,该系统以高性能DSP芯片组TMS320C6416为核心数字处理器,巨大的可重编程逻辑芯片组CPLD为核心。系统逻辑控制器和现场可重编程阵列FPGA作为图像预处理芯片组,用于采样视频数字图像。同时,作者还引入了一种基于进化算法的快速图像相关匹配算法,对目标捕获算法进行了改进。主要部分介绍了硬件结构,工作原理和新的图像相关匹配算法。此外,还讨论了该方法提供的性能与常规匹配算法的比较。理论分析和仿真结果表明,该算法是有效的。

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