CSP Fatigue Life Predictions Based on Electrical Resistance Change

摘要

In situ electrical resistance measurements have been made on daisy-chained chip scale packages (CSPs) during thermal cycling. For the two different CSP configurations used, the average resistance was found to increase nearly linearly with the number of thermal cycles over more than two-thirds of the CSP's life. The rate of resistance increase per cycle for each configuration was found to be quite repeatable, which suggested this increase might be used as a fatigue monitor. In thermal cycling, the resistance change for the 0° to 100℃ temperature range used was typically around 40%, whereas the resistance increase per cycle was on the order of 0.0004%. Detecting this relatively small change requires an instrument with an exceptionally large dynamic range. Because of this, our measurement technique used a temperature compensated Wheatstone bridge. By placing a non-inductive wire wound copper resistor in close proximity to the CSP under test, the temperature coefficient of resistance for the Wheatstone bridge output could be reduced by more than a factor of 100, which reduced the dynamic range required for the instrumentation to a reasonable level. Not only did the daisy-chain resistance show a nearly linear resistance increase, but also failure for each configuration had a typical total resistance change before fatigue failure. Thus for these specimens, the number of cycles-to-failure could be found by dividing the configuration resistance increase for failure by the resistance increase per cycle. If the resistance increase per cycle is a result of the fatigue damage per cycle, then cycles-to-failure for the package could be accurately predicted by measuring the average resistance over a few cycles. Experiments to verify that the increase is due to fatigue will be presented, as well as an analysis of the origin of the increase.