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Chip-Package Resonance in Core Power Supply Structures for a High Power Microprocessor

机译:大功率微处理器核心电源结构中的芯片封装谐振

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摘要

Advanced microprocessors have high current demands at low voltage and require low impedance power across a broad frequency range. Silicon circuits want to look out from their power terminals and see a power supply impedance that is less than or equal to a target impedance. Decoupling capacitance on the chip and package inductance form a parallel RLC circuit that has a high impedance at the chip-package resonant frequency. Circuits on the chip are not able to get the power that they need at this resonant frequency. The RLC parameters have been experimentally measured for a 70 watt microprocessor and an equivalent circuit has been developed. Chip capacitance is a strong function of bias voltage. SPICE simulation of the equivalent circuit reveals the extent of the chip-package resonance issues. The power supply impedance is determined in the resonant frequency band. Time domain simulations show the maximum excursions expected for the power supply voltage onboard the microprocessor chip.
机译:先进的微处理器在低电压下具有高电流需求,并且在很宽的频率范围内需要低阻抗功率。硅电路希望从其电源端子向外看,并看到电源阻抗小于或等于目标阻抗。芯片上的去耦电容和封装电感形成并联的RLC电路,该电路在芯片封装谐振频率下具有高阻抗。芯片上的电路无法在此谐振频率下获得所需的功率。已经为70瓦微处理器对RLC参数进行了实验测量,并开发了等效电路。芯片电容是偏置电压的重要函数。等效电路的SPICE仿真揭示了芯片封装谐振问题的程度。在谐振频带中确定电源阻抗。时域仿真显示了微处理器芯片上的电源电压预期的最大偏移。

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