THREE-DIMENSIONAL ELECTRO-THERMAL SIMULATION OF INTERCONNECT STRUCTURES WITH TEMPERATURE-DEPENDENT PERMITTIVITY

摘要

We present an extraction tool that computes parasitic interconnect parameters with temperature-dependent dielectrics. A stationary electro-thermal analysis is performed, followed by the capacitance extraction, taking the permittivity as function of the temperature distribution into account. The tool is based on the finite element method for two- and three-dimensional analyses of interconnect structures. The simulation package includes a layout file converter as well as a geometry processing and a mesh generation engine, thus allowing a fully automatic layout to capacitance extraction. Our approach has been designed for highly accurate capacitance calculation in modestly large simulation domains, but not for full chip extraction. The main module computes the resistances, capacitances and inductances of the interconnect structures, the distribution of the electric potential, the temperature, and the current density.