首页> 外文会议>Ninth International Symposium on Silicon Materials Science and Technology, Vol.2, May 13-17, 2002, Philadelphia >A NEW JUNCTION TECHNOLOGY BASED ON SELECTIVE CVD OF SIGE ALLOYS FOR CMOS TECHNOLOGY NODES BEYOND 30 NM
【24h】

A NEW JUNCTION TECHNOLOGY BASED ON SELECTIVE CVD OF SIGE ALLOYS FOR CMOS TECHNOLOGY NODES BEYOND 30 NM

机译:一种基于选择性合金的CMOS结技术,其结点超过30 NM

获取原文
获取原文并翻译 | 示例

摘要

Future CMOS technology nodes bring new challenges to formation of source/drain junctions and their contacts, which require fundamentally new approaches. In this paper, we present an overview of a new technology designed to meet the demands of the future technology nodes beyond 30 nm. The new technology is based upon selective deposition of boron or phosphorus doped SiGe alloys at temperatures less than 800℃ in source/drain regions recessed to the desired junction depth. Germanosilicides of Ni and Pt are used to form self-aligned, low resistivity contacts to the junctions. The results indicate that the technology offers great promise in meeting all demands of the end-of-the-roadmap junctions and their contacts.
机译:未来的CMOS技术节点将对源/漏结及其接触的形成提出新的挑战,而这从根本上需要新的方法。在本文中,我们将介绍一种新技术的概述,该技术旨在满足超过30 nm的未来技术节点的需求。这项新技术是基于在低于800℃的温度下,在凹入至所需结深的源/漏区中选择性沉积硼或磷掺杂的SiGe合金。 Ni和Pt的锗硅化物用于与结形成自对准,低电阻率的接触。结果表明,该技术为满足路线图终点及其联系的所有需求提供了广阔的前景。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号