Abstract: A comparison was made between rapid-thermal processing and furnace processing with respect to gate oxidation, polysilicon sidewall oxidation, and junction activation anneal. NMOS and PMOS structures with N$+$PLU$/ polysilicon gates, 6.5 nm gate oxide, and 70 nm source/drain junction depths were processed in parallel, using one-mask FET test structures to define MOSFETs with channel lengths down to 0.18 $mu@m. Good NMOS device characteristics and low junction leakage were observed for all experimental combinations. Rapid-thermal and furnace oxidation exhibited similar gate-oxide breakdown characteristics.!46
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