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Improving yield and reliability of FIB modifications using electrical testing

机译:使用电气测试提高FIB修改的产量和可靠性

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Abstract: Focused Ion Beam technology has two main areas of application for ICs: modification and preparation for technological analysis. The most solicited area is modification. This involves physically modifying a circuit by cutting lines and creating new ones in order to change the electrical function of the circuit. IC planar technologies have an increasing number of metal interconnections making FIB modifications more complex and decreasing their changes of success. The yield of FIB operations on ICs reflects a downward trend that imposes a greater number of circuits to be modified in order to successfully correct a small number of them. This requires extended duration, which is not compatible with production line turn around times. To respond to this problem, two solutions can be defined: either, reducing the duration of each FIB operation or increasing the success rate of FIB modifications. Since reducing the time depends mainly on FIB operator experience, insuring a higher success rate represents a more crucial aspect as both experienced and novice operators could benefit from this improvement. In order to insure successful modifications, it is necessary to control each step of a FIB operation. To do this, we have developed a new method using in situ electrical testing which has a direct impact on the yield of FIB modifications. We will present this innovative development through a real case study of a CMOS ASIC for high-speed communications. Monitoring the electrical behavior at each step in a FIB operation makes it possible to reduce the number of circuits to be modified and consequently reduces system costs thanks to better yield control. Knowing the internal electrical behavior also gives us indications about the impact on reliability of FIB modified circuits. Finally, this approach can be applied to failure analysis and FIB operations on flip chip circuits. !5
机译:摘要:聚焦离子束技术在IC领域有两个主要应用领域:修改和技术分析准备。需求最多的是修改。这涉及通过切割线并创建新的线来物理地修改电路,以改变电路的电功能。 IC平面技术具有越来越多的金属互连,这使得FIB修改更加复杂,并减少了成功的变化。 IC上FIB操作的成品率呈下降趋势,这意味着需要修改大量电路以成功纠正其中的少量电路。这需要延长的持续时间,这与生产线的周转时间不兼容。为了解决此问题,可以定义两种解决方案:减少每次FIB操作的持续时间或提高FIB修改的成功率。由于减少时间主要取决于FIB操作员的经验,因此确保较高的成功率是一个更为关键的方面,因为经验丰富的和新手操作员都可以从此改进中受益。为了确保成功进行修改,有必要控制FIB操作的每个步骤。为此,我们开发了一种使用原位电测试的新方法,该方法直接影响FIB修饰的产量。我们将通过针对高速通信的CMOS ASIC的真实案例研究来介绍这一创新发展。监视FIB操作中每个步骤的电气行为,可以减少要修改的电路数量,并可以通过更好的良率控制来降低系统成本。了解内部电气行为也可以为我们提供有关FIB修改电路的可靠性影响的指示。最后,这种方法可以应用于倒装芯片电路的故障分析和FIB操作。 !5

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