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A 0.7-V 10-bit 3μW Analog-to-Digital Converter for Implantable Biomedical Applications

机译:用于可植入生物医学应用的0.7V 10位3μW模数转换器

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For implantable biosensor applications which require a low-cost signal processing unit that features ultra-low power and low-voltage capability as well, this paper proposes a solution by merging switched-opamp technique and foreground digital calibration into a single 10-bit ADC. Utilization of the switched-opamp technique allows for low supply operation down to 0.7 V. The insufficient gain associated with low supply voltage analog devices is manipulated by the employment of foreground calibration. Ultra-low power consumption is achieved through adequate circuit structure selection and weak-inversion transistor biasing. The ADC employs the cyclic/algorithmic architecture which uses only two opamps and two comparators. Simulation results with CMOS 0.13 μm process model demonstrate that the signal to noise and distortion ratio (SNDR) at 10-KHz clock rate is 57 dB when 0.5% capacitor mismatch is considered. The power consumption of the whole ADC is 3 μW with 0.7 V supply.
机译:对于需要低成本信号处理单元的可植入生物传感器应用,该应用具有超低功率和低压能力,本文通过将开关opamp技术和前景数字校准合并到单个10位ADC中来提出解决方案。开关技术的利用允许低供应操作降至0.7 V.通过采用前景校准来操纵与低电源电压模拟设备相关的收益不足。通过足够的电路结构选择和弱反转晶体管偏置来实现超低功耗。 ADC采用仅使用两个opamps和两个比较器的循环/算法架构。 CMOS0.13μm工艺模型的仿真结果表明,当考虑0.5%电容器不匹配时,10-KHz时钟速率下的噪声和失真率(SNDR)的信号是57dB。整个ADC的功耗为3μW,电源为0.7V。

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